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 inference benefit from partitioning the workload over multiple compute nodes in terms of performance and energy-efficiency. However%2C mapping large models on distributed embedded systems is a complex task%2C due to low latency and high throughput requirements combined with strict energy and memory constraints. In this paper%2C we present a novel approach for hardware-aware layer scheduling of DNN inference in distributed embedded systems. Therefore%2C our proposed framework uses a graph-based algorithm to automatically find beneficial partitioning points in a given DNN. Each of these is evaluated based on several essential system metrics such as accuracy and memory utilization%2C while considering the respective system constraints. We demonstrate our approach in terms of the impact of inference partitioning on various performance metrics of six different DNNs. As an example%2C we can achieve a 47.5 %25 throughput increase for EfficientNet-B0 inference partitioned onto two platforms while observing high energy-efficiency.?quality=80&w=800)
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